In the field of DC--DC converters, switching mode power supply (SMPS) systems are included in power factor correction (PFC) systems. A control loop is commonly formed in an integrated form and includes a two signal multiplier. One input signal is commonly an error signal derived from a feedback line, while the other input signal may be, for example, representative of the value of the supply voltage or representative of another pertinent parameter.
An example application of a power factor correction (PFC) circuit follows the same configuration of a typical boost converter. The only difference being that the supply voltage is a rectified sinusoid voltage rather than a constant voltage, according to the prior art PFC stage shown in FIG. 1. The control block CONTROLLER of the PFC stage ensures that the current drawn from the AC line is sinusoidal and in phase with the main voltage VAC. This configuration provides the most efficient use of electric energy. Usually, the PFC stage is positioned between the AC line and the load, which is often represented by electronic circuits.
FIG. 2 shows a more detailed block diagram of a PFC stage according to the prior art. A feedback signal of the output voltage V.sub.OUT is applied to the inverting input of an operational amplifier OPA that outputs an error signal V.sub.ERROR. This error signal V.sub.ERROR is applied to a first input of the multiplier circuit. The other input of the multiplier circuit is applied a portion of the rectified main voltage. The output signal of the multiplier circuit is used as a reference signal for the comparator and represents the current flowing through the power device. This reference signal is given by the expression: EQU R.sub.EFCS =K*V.sub.ERROR *V.sub.MULT
where K represents the characteristic constant of the multiplier circuit.
The power device turns off when the current sensing resistor R.sub.SENSE detects a voltage higher than the output signal R.sub.EFCS of the multiplier. A turn on signal of the power device originates from the ZCD block and takes place upon a decrease to zero of the recirculating current in the inductor. In particular, the present invention concerns the multiplier circuit used in these types of applications.
In these applications, the control loop reduces unsatisfactory limits of stability and of immunity to the noise that may come from the AC line and/or originate from the system switchings. As far as stability is concerned, the open loop gain of the system illustrated in FIG. 2 is proportional to the square of the AC voltage, to the load resistance, and to the multiplier's constant K: EQU G.sub.LOOP .infin.V.sub.AC.sup.2 *R.sub.LOAD *K (1)
As a result of an increase in the main voltage and in the load resistance connected to the output of the circuit, the open loop gain increases which may cause instability. By reducing the value of the multiplier's constant K, the open loop gain is reduced. Also, the value of the constant K has a similar effect on the characteristics of immunity to noise.